Company Filing History:
Years Active: 2020-2022
Title: Nandhini Chandramoorthy: Innovator in Memory Hierarchies and Processor Configurations
Introduction
Nandhini Chandramoorthy is a prominent inventor based in Yorktown Heights, NY (US). She has made significant contributions to the field of computer engineering, particularly in optimizing memory hierarchies and processor configurations. With a total of three patents to her name, her work focuses on enhancing energy efficiency and reliability in computing systems.
Latest Patents
Chandramoorthy's latest patents include a "System and method for an error-aware runtime configurable memory hierarchy for improved energy efficiency." This invention optimizes operations in a Neural Network Accelerator (NNAccel) by utilizing a hierarchy of neural network layers and configurable memory modules. The method detects bit error rates in memory modules and adjusts operational parameters to maintain accuracy in processing.
Another notable patent is the "Reliability-aware runtime optimal processor configuration." This system integrates soft and hard error data into a balanced reliability metric (BRM) to optimize processor reliability. By adjusting processor voltage and core counts, the method enhances overall performance and reliability through feedback control mechanisms.
Career Highlights
Nandhini Chandramoorthy is currently employed at International Business Machines Corporation (IBM), where she continues to innovate in the field of computer systems. Her work has garnered attention for its practical applications in improving energy efficiency and reliability in modern computing.
Collaborations
Chandramoorthy has collaborated with notable colleagues, including Alper Buyuktosunoglu and Karthik V Swaminathan. These collaborations have further enriched her research and development efforts in the technology sector.
Conclusion
Nandhini Chandramoorthy is a trailblazer in the realm of computer engineering, with her patents reflecting a commitment to advancing technology. Her innovative approaches to memory hierarchies and processor configurations are paving the way for more efficient and reliable computing systems.
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