logo

For the Inventor, By the Inventor

Taipei, Taiwan

Nan-Chun Lien

This inventor holds 20 USPTO granted patents and 1 published patent application, primarily in Semiconductor Memory. Top assignees: M31 Technology Corporation, National Yang Ming Chiao Tung University, Faraday Technology Corporation. Active years: 2011-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nan-Chun Lien. Retrieved from https://idiyas.com/inventor/nan-chun-lien

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20 

% Patents Active = 95.0

Average Co-Inventor Count = 2.6

ph-index = 4

Forward Citations = 51(Granted Patents)


Location History:

  • Hsinchu, TW (2014)
  • Taipei, TW (2011 - 2018)
  • Zhubei, TW (2018)
  • Hsinchu County, TW (2023 - 2024)

Company Filing History:

goldMedal15 out of 59 
 
M31 Technology Corporation
 patents
silverMedal4 out of 1,247 
 
National Yang Ming Chiao Tung University
 patents
bronzeMedal2 out of 412 
 
Faraday Technology Corporation
 patents
where one patent can have more than one assignee

Years Active: 2011-2026

Loading Chart...
Areas of Expertise:
Circuit Module
Timing Control
Memory Module
SRAM
Writing Control
Memory Access
Pulse Width Modulation
Threshold Voltage
Power-On Detector
Bit-Line Voltage
Oscillator
Memory Compiler
20 patents (USPTO):Explore Patents
1. 12731624 - Circuit module with improved timing control (2026-09-08),
2. 12293785 - Circuit module with reliable margin configuration (2025-05-06),
3. 12205635 - Memory module with improved timing adaptivity of sensing amplification (2025-01-21),
4. 12080368 - Circuit module with improved line load (2024-09-03),
5. 11935581 - Circuit module with reliable margin configuration (2024-03-19),
6. 11742000 - Circuit module with improved line load (2023-08-29),
7. 10074418 - SRAM module and writing control method thereof (2018-09-11),
8. 10014035 - Control device for controlling semiconductor memory device (2018-07-03),
9. 9870817 - SRAM module and writing control method thereof (2018-01-16),
10. 9728250 - Memory write tracking device and method (2017-08-08),
11. 9496014 - Random access memory and memory access method thereof (2016-11-15),
12. 9378808 - Pulse width modulation device (2016-06-28),
13. 9336865 - Multi-port SRAM module and control method thereof (2016-05-10),
14. 9299421 - Static random access memory and method thereof (2016-03-29),
15. 9213789 - Method of generating optimized memory instances using a memory compiler (2015-12-15),

Title: The Innovative Journey of Nan-Chun Lien

Introduction: Nan-Chun Lien, a pioneering inventor hailing from Taipei, Taiwan, has made significant contributions to the world of technology through his groundbreaking innovations.

Latest Patents: Nan-Chun Lien holds several patents in the field of electronics and semiconductor technology, with his most recent patent focusing on advanced nanotechnology applications in consumer electronics.

Career Highlights: With a career spanning over two decades, Nan-Chun Lien has worked with leading tech companies in Taiwan, honing his skills and expertise in research and development. His innovative solutions have revolutionized the industry, earning him recognition as a visionary inventor.

Collaborations: Nan-Chun Lien has collaborated with top research institutions and universities worldwide, fostering a culture of innovation and knowledge sharing. His partnerships have led to the development of cutting-edge technologies that have shaped the future of the semiconductor industry.

Conclusion: Nan-Chun Lien's relentless pursuit of innovation and his passion for pushing the boundaries of technology have established him as a trailblazing inventor in the global tech landscape. His contributions continue to inspire the next generation of inventors and pave the way for future advancements in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…