Beijing, China

Na Zhou

This inventor holds 4 USPTO granted patents and 5 published patent applications. Top assignee: Chinese Academy of Sciences. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Na Zhou. Retrieved from https://idiyas.com/inventor/na-zhou-clcos98g

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2026

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4 patents (USPTO):Explore Patents

Title: Na Zhou: Innovator in Semiconductor Manufacturing

Introduction: Na Zhou is a prominent inventor based in Beijing, China. He has made significant contributions to the field of semiconductor manufacturing. His innovative methods have the potential to enhance the efficiency and performance of semiconductor devices.

Latest Patents: Na Zhou holds a patent titled "Method for manufacturing semiconductor and semiconductor." This patent describes a comprehensive method that includes providing a substrate with an active region trench, forming a channel stack of a gate-all-around transistor, and epitaxially growing source and drain crystal structures. The method emphasizes the importance of stopping epitaxial growth at specific crystal planes and filling gaps with isotropic metal material to form the source and drain of the transistor.

Career Highlights: Na Zhou is affiliated with the Chinese Academy of Sciences, where he conducts research and development in semiconductor technologies. His work has garnered attention for its innovative approach to manufacturing processes.

Collaborations: Na Zhou collaborates with esteemed colleagues, including Junjie Li and Enxu Liu, who contribute to his research endeavors. Their combined expertise enhances the quality and impact of their work in the semiconductor field.

Conclusion: Na Zhou's contributions to semiconductor manufacturing exemplify the spirit of innovation in technology. His patent and collaborative efforts position him as a key figure in advancing semiconductor research and development.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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