Tianjin, China

Na Liu

This inventor holds 2 USPTO granted patents. Top assignees: Hefei University of Technology, Other. Active years: 2009-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Na Liu. Retrieved from https://idiyas.com/inventor/na-liu-n47yf02n

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.8

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2009-2014

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2 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Na Liu: Pioneering Advances in Semiconductor Processing**

Introduction

Na Liu, an accomplished inventor based in Tianjin, China, has made significant contributions to the field of semiconductor processing. With a portfolio of two patents, Liu's innovations focus on enhancing the efficiency and effectiveness of processes related to integrated circuits and silicon wafers.

Latest Patents

Among Liu's notable inventions is a **Method of Cleaning Copper Material Surfaces in Ultra Large Scale Integrated Circuits After Polishing**. This method involves creating a water-soluble cleaning solution consisting of specific proportions of surfactant, chelating agent, and corrosion inhibitor, mixed with deionized water. The resulting solution effectively cleans copper material surfaces post-polishing under controlled conditions of pressure, flow rate, and washing time.

Another significant patent is the **Method of Eliminating Surface Stress of Silicon Wafer**. This innovative approach involves the formation of anti-stress grooves on the silicon wafer surface, which effectively alleviates surface stress. This method not only prevents issues such as slip lines and dislocation arrangements but is also cost-effective and easy to manage, utilizing only existing processing equipment.

Career Highlights

Na Liu has been an integral part of the technological advancement landscape. Throughout his career, Liu has been associated with reputable institutions, including the Hefei University of Technology, where he has collaborated on various research projects. His work has contributed to bridging the gap between theoretical research and practical application in semiconductor technology.

Collaborations

Liu has collaborated with esteemed colleagues, including Yuling Liu and Jianxin Zhang, enhancing his research impact through cooperative efforts. Their combined expertise has contributed to refining processes and developing new techniques in semiconductor processing, facilitating advancements in the industry.

Conclusion

In summary, Na Liu stands out as an influential inventor in the semiconductor field, with patents that not only showcase his innovative spirit but also address practical challenges in manufacturing processes. His commitment to improving technology and efficiency in semiconductor applications underscores the vital role of inventors in shaping the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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