Karnataka, India

Muralidharan S Chilukoor

This inventor holds 1 USPTO granted patent. Top assignee: Intel Corporation. Active years: 2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Muralidharan S Chilukoor. Retrieved from https://idiyas.com/inventor/muralidharan-s-chilukoor

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2009

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1 patent (USPTO):Explore Patents

Title: Muralidharan S Chilukoor: Innovator in Error Detection Technologies

Introduction

Muralidharan S Chilukoor is a notable inventor based in Karnataka, India. He has made significant contributions to the field of error detection technologies, particularly through his innovative patent. His work is essential in enhancing the reliability of data transmission.

Latest Patents

Muralidharan holds a patent for "Techniques to perform error detection." This patent describes a method and apparatus to perform cyclic redundancy check computations for error detection. The invention includes a first stage with a set of computation elements, multiplexers, and a latch. A second stage is connected to the latch, which also includes a second set of computation elements and additional multiplexers. The first and second stages work together to perform cyclic redundancy check computations for packets, ensuring data integrity.

Career Highlights

Muralidharan is currently employed at Intel Corporation, where he applies his expertise in developing advanced technologies. His work at Intel has positioned him as a key player in the innovation of error detection methods.

Collaborations

Muralidharan has collaborated with talented coworkers such as Prashant Ranjan and Jain Philip. Their combined efforts contribute to the advancement of technology in their field.

Conclusion

Muralidharan S Chilukoor is a distinguished inventor whose work in error detection technologies has made a significant impact. His contributions continue to enhance the reliability of data transmission systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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