Tokyo, Japan

Motoyuki Sato

This inventor holds 2 USPTO granted patents and 3 published patent applications. Top assignee: Tokyo Electron Limited. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Motoyuki Sato. Retrieved from https://idiyas.com/inventor/motoyuki-sato-3uuigyya

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Motoyuki Sato: Semiconductor Manufacturing and Memory Device Patents.

Introduction

Motoyuki Sato is an inventor based in Tokyo, Japan, whose patent work focuses on semiconductor manufacturing and memory-device design. He is associated with Tokyo Electron Limited and has 2 patents listed in the information provided.

Latest Patents

Sato’s listed patents address semiconductor fabrication and the integration of semiconductor dies.

“Manufacturing method for semiconductor device” describes a process for forming and bonding two semiconductor elements. The method uses substrates with different elastic moduli, forms an insulating layer and semiconductor element on the first substrate, bonds that element to a second semiconductor element, and then removes the first substrate from the resulting laminate.

“Semiconductor memory device” describes a stacked-die memory structure. Its first die includes a memory-cell array, conductive lines, and a bonding layer with electrically connected pads. At least one bonding pad is offset from its corresponding conductive line when viewed along the specified direction, and a second die is placed on the bonding layer.

Career Highlights

Sato’s listed inventions concern semiconductor-device manufacturing and memory architecture. His association with Tokyo Electron Limited connects his work to a company active in semiconductor manufacturing technology.

Collaborations

Kiyotaka Imai is identified as Sato’s coworker. The information provided does not specify a particular patent collaboration between them.

Conclusion

Motoyuki Sato’s listed patent work highlights approaches to semiconductor bonding, substrate removal, and stacked memory-device design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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