Mohamad Shaker Sarwary

Title: Mohamad Shaker Sarwary: Innovator in Integrated Circuit Design Verification

Introduction: Mohamad Shaker Sarwary is a notable inventor based in San Diego, CA. He has made significant contributions to the field of integrated circuit design verification. His innovative approach focuses on providing users with effective coverage information for verification signoff.

Latest Patents: Sarwary holds a patent for a system and methods for reasonable functional verification of an integrated circuit design. This patent outlines a process that offers users coverage information based on formal analysis techniques. The coverage is presented in design-centric metrics, which include the number of reads from or writes to memories and the number of bit changes for counters. The system incorporates a setup for failure (SFF) function and a trigger the failure (TTF) function. During the SFF analysis, formal methods are applied to approach suspected failure states. The TTF analysis then searches for states that violate predetermined properties. If the results are inconclusive, users receive a design-centric coverage metric for signoff.

Career Highlights: Sarwary is currently employed at Atrenta, Inc., where he continues to develop innovative solutions in the realm of integrated circuit design. His work has been instrumental in enhancing the verification processes within the industry.

Collaborations: One of his notable coworkers is Maher Mneimneh, with whom he collaborates on various projects related to integrated circuit design and verification.

Conclusion: Mohamad Shaker Sarwary's contributions to integrated circuit design verification demonstrate his commitment to innovation and excellence in the field. His patent reflects a significant advancement in the verification process, providing valuable tools for users in the industry.