Tokyo, Japan

Mitsuru Aoki

This inventor holds 1 USPTO granted patent. Top assignee: Renesas Electronics Corporation. Active years: 2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mitsuru Aoki. Retrieved from https://idiyas.com/inventor/mitsuru-aoki-si9whzfq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2014

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1 patent (USPTO):Explore Patents

Title: Mitsuru Aoki - Innovator in Semiconductor Manufacturing

Introduction

Mitsuru Aoki is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor manufacturing. His innovative approach has led to advancements that enhance the quality of wire bonding processes.

Latest Patents

Mitsuru Aoki holds 1 patent for his invention titled "Method of manufacturing semiconductor device, and wire bonder." This patent focuses on improving the quality of wire bonding by reducing vibrations in the lead frame or wiring substrate after the bonding process. The invention includes a cooling blower that cools the wire-bonded matrix frame, allowing for stepwise temperature reduction. This method ensures that the temperature of the matrix frame decreases gradually after wire bonding, enhancing the overall quality of the semiconductor device.

Career Highlights

Mitsuru Aoki is associated with Renesas Electronics Corporation, where he applies his expertise in semiconductor technology. His work has been instrumental in developing more efficient manufacturing processes that benefit the industry.

Collaborations

Mitsuru Aoki has collaborated with notable colleagues, including Kazuyuki Misumi and Hideyuki Arakawa. Their combined efforts have contributed to advancements in semiconductor technology and manufacturing processes.

Conclusion

Mitsuru Aoki's innovative contributions to semiconductor manufacturing demonstrate his commitment to enhancing technology in this critical field. His patent reflects a significant improvement in wire bonding quality, showcasing his expertise and dedication to innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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