Castro Valley, CA, United States of America

Mirek Boruta

This inventor holds 5 USPTO granted patents. Top assignees: Lsi Logic Corporation, Other. Active years: 1997-1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mirek Boruta. Retrieved from https://idiyas.com/inventor/mirek-boruta

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.1

ph-index = 2

Forward Citations = 31(Granted Patents)


Company Filing History:


Years Active: 1997-1998

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5 patents (USPTO):Explore Patents

Title: Mirek Boruta: Semiconductor Manufacturing Inventor

Introduction

Mirek Boruta is an inventor based in Castro Valley, California. His work includes inventions related to semiconductor wafer processing and integrated circuit packaging. He holds 5 patents.

Latest Patents

Boruta’s listed patents include “Multi cut wafer saw process,” which describes a method for dicing a plate-like wafer, particularly a semiconductor wafer, while removing deposited material along a scribe line. The process makes two scribing cuts on opposite sides of the line, followed by a severing cut along the line.

His “High pressure lid seal clip apparatus” patent describes sealing a lid to an integrated circuit package. A spring-biased pressure foot, carried by a secondary loading jig, applies force while the sealant cures. The jig attaches to a fabrication boat and positions the force to support assembly at the center of the package lid.

Career Highlights

Boruta is associated with LSI Logic Corporation. His patent work reflects contributions to wafer dicing and integrated circuit package assembly.

Collaborations

Boruta’s listed coworkers include Sutee Vongfuangfoo and Galen Kirkpatrick.

Conclusion

Mirek Boruta’s patents address practical challenges in semiconductor manufacturing, from precise wafer cutting to applying pressure during integrated circuit package sealing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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