Min-Yih Luo

Title: Min-Yih Luo and His Semiconductor Patents.

Introduction

Min-Yih Luo is an inventor based in San Jose, California, whose patent work addresses semiconductor devices and electrostatic discharge protection. His listed portfolio includes 2 patents, with inventions focused on protecting integrated circuits from electrical stress.

Latest Patents

Luo’s listed patents include “Floating Gate Structure with High Electrostatic Discharge Performance” and “Electrostatic Discharge Protection Circuit for Integrated Circuits.”

The floating-gate invention describes a semiconductor structure with an embedded diode designed to have less temperature dependence than a Zener diode. Its breakdown voltage exceeds the associated integrated circuit’s operating voltage, while its snapback trigger voltage is below the semiconductor structure’s breakdown voltage.

The ESD protection circuit patent describes two protection components coupled in series. The circuit is designed so its snapback holding voltage exceeds its operating voltage, while its snapback trigger voltage remains below the integrated circuit’s oxide breakdown voltage.

Career Highlights

Luo is associated with Vishay-Siliconix. His patent work reflects a focus on circuit and device designs that help protect semiconductor components during electrostatic discharge events.

Collaborations

Luo’s listed coworkers include Christoph Werren and Kyle Terrill. Their names provide context for the professional network associated with his work.

Conclusion

Min-Yih Luo’s patents address complementary approaches to electrostatic discharge protection, from embedded-diode floating-gate structures to circuits designed to safeguard integrated circuits.