Min-jan Chen

Title: Min-jan Chen: Innovator in CMOS Technology

Introduction

Min-jan Chen is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the development of PMOS devices. His innovative work has led to advancements that enhance the reliability and performance of CMOS applications.

Latest Patents

Min-jan Chen holds a patent for a "Selective CESL structure for CMOS application." This invention addresses the negative bias time instability (NBTI) affecting PMOS devices. The patent describes a PMOS device that includes a barrier layer over a portion of the gate structure, a gate spacer, and source/drain regions. A stressed layer is formed over the barrier layer, which is preferably an oxide layer and is not formed for NMOS devices. This innovation aims to improve the stability and efficiency of PMOS devices in various applications.

Career Highlights

Min-jan Chen is associated with Taiwan Semiconductor Manufacturing Company Limited, a leading player in the semiconductor industry. His work at this esteemed company has allowed him to contribute to cutting-edge technologies that shape the future of electronics. His expertise in semiconductor fabrication processes has been instrumental in advancing the performance of integrated circuits.

Collaborations

Min-jan Chen has collaborated with notable colleagues, including Chia-Lin Chen and Jau-Jey Wang. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas within the semiconductor field.

Conclusion

Min-jan Chen's contributions to CMOS technology and his innovative patent demonstrate his commitment to advancing semiconductor technology. His work continues to influence the industry and pave the way for future developments in electronic devices.