Min-Chie Jeng

Title: Min-Chie Jeng: Innovator in Transistor Simulation Technology

Introduction

Min-Chie Jeng is a notable inventor based in Cupertino, CA (US). He has made significant contributions to the field of transistor technology, particularly in simulating dynamic behavior. His innovative approach has led to the development of a unique patent that enhances the modeling of transistors.

Latest Patents

Min-Chie Jeng holds a patent titled "Method and system for simulating dynamic behavior of a transistor." This patent describes a method for modeling the dynamic behavior of a transistor by representing its static behavior using a lookup table. The process involves selecting an instance of the transistor from the lookup table, computing its previous state using a non-quasi static analytical model, and determining variations in channel charge over time. Additionally, it computes a modified terminal voltage that accounts for dynamic voltage across parasitic resistance, storing this information in a memory device for accurate modeling.

Career Highlights

Min-Chie Jeng is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of electronic design automation. His work focuses on improving the accuracy and efficiency of transistor simulations, which are crucial for modern electronic devices.

Collaborations

Throughout his career, Min-Chie has collaborated with esteemed colleagues such as Bruce W McGaughy and Lifeng Wu. These collaborations have further enriched his research and development efforts in the field of transistor technology.

Conclusion

Min-Chie Jeng's contributions to the simulation of transistor behavior represent a significant advancement in electronic design. His innovative methods and collaborative spirit continue to influence the industry positively.