Mikhail Chetin

Title: Mikhail Chetin: Innovator in Integrated Circuit Design

Introduction

Mikhail Chetin is a notable inventor based in San Jose, California. He has made significant contributions to the field of integrated circuit design, holding three patents that showcase his innovative approaches to yield calculation and delay propagation.

Latest Patents

Chetin's latest patents include a method and apparatus for yield calculation using statistical timing data that accounts for path and stage delay correlation. This invention provides an improved approach for yield calculation by analyzing statistical timing data and generating yield probability results. Another significant patent focuses on delay propagation for multiple logic cells using correlation and coskewness of delays and slew rates in integrated circuit design. This method involves retrieving correlation and coskewness values to determine delay distributions and verify performance values for integrated circuits.

Career Highlights

Mikhail Chetin is currently employed at Cadence Design Systems, Inc., where he applies his expertise in integrated circuit design. His work has been instrumental in advancing methodologies that enhance the performance and reliability of electronic devices.

Collaborations

Chetin collaborates with talented professionals in his field, including Igor Keller and Praveen Ghanta. Their combined efforts contribute to the innovative environment at Cadence Design Systems.

Conclusion

Mikhail Chetin's contributions to integrated circuit design through his patents and collaborations highlight his role as a leading inventor in the industry. His work continues to influence advancements in technology and electronic design.