This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Arteris, Inc.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Michael Moriaud: Register Memory Resilience
Introduction
Michael Moriaud is an inventor associated with Elancourt, France, and Arteris, Inc. His patent work addresses data integrity in electronic systems through techniques for writing data and resilience bits to register memory.
Latest Patents
Moriaud is credited with 1 patent: “Writing Data and Resilience Bits to Register Memory.” The invention describes writing data to an address in register memory by dividing data chunks into sub-granules and distributing address bits among them. Any address bits not distributed to the data sub-granules are placed in an address sub-granule. A resilience algorithm computes resilience bits for each sub-granule, and the data chunks and resilience bits are then written to register memory.
Career Highlights
Moriaud’s listed patent reflects work on memory systems and data resilience. The approach integrates resilience information into the register-memory write process, helping support the handling of data and address information within an electronic system.
Collaborations
Moriaud is associated with Arteris, Inc. His listed coworker is Frederic Greus.
Conclusion
Michael Moriaud’s patent focuses on combining data storage with resilience bits in register memory, highlighting his contribution to techniques for electronic-system data integrity.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile