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Lee's Summit, MO, United States of America

Michael K Eschmann

This inventor holds 9 USPTO granted patents. Top assignee: Intel Corporation. Active years: 1996-2013.

USPTO Granted Patents = 9

% Patents Active = 55.6

Average Co-Inventor Count = 2.3

ph-index = 4

Forward Citations = 76(Granted Patents)

Location History:

Folsom, CA (US) (1996 - 2005)
Lees Summit, MO (US) (2007 - 2013)

Company Filing History:

9 out of 56,240

Intel Corporation

Years Active: 1996-2013

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9 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8621144 - Accelerated resume from hibernation in a cached disk system (2013-12-31),

2. 8347141 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility (2013-01-01),

3. 7962785 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility (2011-06-14),

4. 7721051 - Techniques to improve cache performance (2010-05-18),

5. 7627713 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility (2009-12-01),

6. 7231497 - Merging write-back and write-through cache policies (2007-06-12),

7. 6957280 - Streamlining ATA device initialization (2005-10-18),

8. 6779062 - Streamlining ATA device initialization (2004-08-17),

9. 5511069 - Method and apparatus for controlling a communication device through a (1996-04-23),

I specialize in innovations, inventions, inventors, patent attorneys, assignees, and patents.

Profile summary based on public USPTO records.

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