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For the Inventor, By the Inventor

Pepperell, MA, United States of America

Michael I Catherwood

This inventor holds 28 USPTO granted patents and 2 published patent applications and 10 EPO patents, primarily in Processor Architecture. Top assignee: Microchip Technology Inc.. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Michael I Catherwood. Retrieved from https://idiyas.com/inventor/michael-i-catherwood

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 28 

% Patents Active = 96.4

 

Average Co-Inventor Count = 1.8

ph-index = 5

Forward Citations = 75(Granted Patents)


Location History:

  • Massachusetts, MA (US) (2006)
  • Pepperell, MA (US) (2003 - 2011)
  • Georgetown, TX (US) (2013 - 2021)
  • Tyler, TX (US) (2024)

Company Filing History:

goldMedal28 out of 1,441 
 
Microchip Technology Inc.
 patents

Years Active: 2003-2026

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Areas of Expertise:
Central Processing Unit
Instruction Set
Multi-Core Integration
Error Handling
Data Space Arbiter
DSP Engine
Power Control
Interrupt Management
Program Memory Protection
Arithmetic Processing
ECC Error Injection
Configuration Mechanism
28 patents (USPTO):Explore Patents
1. 12602161 - Accelerated read, modify, write operations (2026-04-14),
2. 12393429 - Atomic instruction set and architecture with bus arbitration locking (2025-08-19),
3. 12346722 - Systems and methods for managing interrupt priority levels (2025-07-01),
4. 12093688 - Multibit shift instruction (2024-09-17),
5. 12001270 - Vector fetch bus error handling (2024-06-04),
6. 10983931 - Central processing unit with enhanced instruction set (2021-04-20),
7. 10802866 - Central processing unit with DSP engine and enhanced context switch capabilities (2020-10-13),
8. 10776292 - Apparatus and method for protecting program memory for processing cores in a multi-core integrated circuit (2020-09-15),
9. 10248521 - Run time ECC error injection scheme for hardware validation (2019-04-02),
10. 10120815 - Configurable mailbox data buffer apparatus (2018-11-06),
11. 9858083 - Dual boot panel SWAP mechanism (2018-01-02),
12. 9619231 - Programmable CPU register hardware context swap mechanism (2017-04-11),
13. 8984198 - Data space arbiter (2015-03-17),
14. 8856406 - Peripheral trigger generator (2014-10-07),
15. 8688964 - Programmable exception processing latency (2014-04-01),

Title: Innovator Spotlight: Michael I. Catherwood

Introduction: Michael I. Catherwood, based in Pepperell, Massachusetts, is an accomplished inventor with a remarkable portfolio of 25 patents. His contributions to technology showcase his innovative thinking and problem-solving abilities, particularly in the fields of computing and data processing.

Latest Patents: Two of Michael's latest patents exemplify his expertise in developing advanced computing solutions. The first, titled "Multibit Shift Instruction," describes an article of manufacture that includes a non-transitory machine-readable medium. This medium incorporates instructions enabling a processor to execute a shift instruction, thereby allowing data to be efficiently manipulated in memory. The shift instruction includes a source parameter and a bit size parameter, facilitating complex data operations.

The second patent, "Vector Fetch Bus Error Handling," presents a sophisticated computer system architecture. This invention utilizes a non-transitory computer-readable memory to store vital data including a vector table and an exception handler. It allows the processor to identify exceptions and execute error handling routines effectively, ensuring system stability and reliability.

Career Highlights: Michael I. Catherwood has made significant strides in technology during his career at Microchip Technology Inc., a leading firm in the semiconductor industry. His role in driving innovation and developing new technologies has been pivotal in enhancing the capabilities of the company and its products.

Collaborations: Throughout his career, Michael has worked alongside notable colleagues such as David Mickey and Bryan Kris. Their collaborative efforts have contributed to the successful development of various technologies and solutions within the organization.

Conclusion: Michael I. Catherwood exemplifies the spirit of innovation through his extensive patent portfolio and contributions to technology at Microchip Technology Inc. His work continues to influence advancements in computing, making him a significant figure in the landscape of modern inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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