Taichung, Taiwan

Meng-Jie Lee

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Siliconware Precision Industries, Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Meng-Jie Lee. Retrieved from https://idiyas.com/inventor/meng-jie-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Meng-Jie Lee: Inventor in Electronic Packaging

Introduction

Meng-Jie Lee is an inventor based in Taichung, Taiwan. His patent work includes an electronic packaging design intended to support miniaturization. Lee is associated with Siliconware Precision Industries, Ltd. His record includes 1 patent.

Latest Patents

Lee’s listed patent is “Electronic Package and Manufacturing Method Thereof.” It describes an electronic module containing first and second electronic elements, positioned on a carrier structure that embeds a third electronic element. The third element is a photonic chip electrically connected to the electronic module. This configuration can reduce the carrier structure’s layout area and help meet miniaturization requirements.

Career Highlights

Lee’s patent focuses on integrating electronic and photonic components within a compact package. The disclosed arrangement combines a carrier structure, an electronic module, and an embedded photonic chip.

Collaborations

Lee’s listed coworkers include Chih-Nan Lin and Ci-Hong Yan. The patent information provided identifies Siliconware Precision Industries, Ltd. as his company.

Conclusion

Meng-Jie Lee’s listed invention addresses electronic-package miniaturization through the integration of electronic elements and a photonic chip.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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