San Jose, CA, United States of America

Mehdy Khatakhotan


Average Co-Inventor Count = 1.0

ph-index = 1

Forward Citations = 119(Granted Patents)


Company Filing History:


Years Active: 1992

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1 patent (USPTO):Explore Patents

Title: Mehdy Khatakhotan: Innovator in Gate Array Architecture

Introduction

Mehdy Khatakhotan is a notable inventor based in San Jose, CA (US). He has made significant contributions to the field of integrated circuit design, particularly through his innovative patent related to gate array architecture. His work has implications for the development of very large scale integration circuits.

Latest Patents

Khatakhotan holds a patent titled "Gate array architecture with basic cell interleaved gate electrodes." This invention presents an interleaved channeless gate array architecture designed for fabricating very large scale integration circuits. The architecture consists of multiple rows or columns of basic cells, each containing a pair arrangement of complementary channel MOS transistors. The gate electrode structure features comb-shaped gate electrodes with parallel spatially disposed legs, which are alternately interleaved. This design allows for efficient circuit design by forming metal interconnects across the basic cells, facilitating connections to the drain/source areas of the transistors.

Career Highlights

Mehdy Khatakhotan is currently associated with S-MOS Systems, Inc., where he applies his expertise in integrated circuit design. His innovative approach to gate array architecture has positioned him as a key figure in the advancement of semiconductor technology.

Collaborations

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Conclusion

Mehdy Khatakhotan's contributions to gate array architecture exemplify the innovative spirit of modern inventors. His work continues to influence the field of integrated circuit design, showcasing the importance of creativity in technology development.

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