Hillsboro, OR, United States of America

Meenakshisundaram Ramanathan

This inventor holds 2 USPTO granted patents and 3 published patent applications. Top assignee: Intel Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Meenakshisundaram Ramanathan. Retrieved from https://idiyas.com/inventor/meenakshisundaram-ramanathan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

% Patents Active = 50.0

Average Co-Inventor Count = 11.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Meenakshisundaram Ramanathan: Innovator in Integrated Circuit Structures

Introduction

Meenakshisundaram Ramanathan is an inventor based in Hillsboro, OR (US). He has made significant contributions to the field of integrated circuit structures. Although he currently holds no granted patents, his innovative ideas are reflected in his latest patent applications.

Latest Patent Applications

1. **INTEGRATED CIRCUIT STRUCTURES HAVING DIRECT-ASSEMBLED LINKS FOR UNIFORM GRID METAL GATE AND TRENCH CONTACT CUT** - This application describes integrated circuit structures that include a gate electrode over a vertical stack of horizontal nanowires or a fin. A conductive trench contact is adjacent to the gate electrode, separated by a dielectric sidewall spacer. The structure features first and second parallel dielectric cut plug structures that extend through the gate electrode, the dielectric sidewall spacer, and the conductive trench contact. A first conductive link is positioned in a recess of the first dielectric cut plug structure, making contact with a side of the gate electrode. Similarly, a second conductive link is located in a recess of the second dielectric cut plug structure, connecting with a side of the conductive trench contact.

2. **GATE CONTACT PATTERNING FOR STATIC RANDOM-ACCESS MEMORY** - This application discloses integrated circuit (IC) structures that include static random-access memory (SRAM) fabricated using gate contact patterning after source/drain (S/D) metallization. An example IC structure features a transistor with an S/D region and a gate electrode material. The S/D contact is in electrical contact with the S/D region, while the gate contact connects with the gate electrode material. The S/D contact comprises a first electrically conductive material, and the gate contact consists of a second electrically conductive material. Notably, a portion of the second electrically conductive material is in contact with a portion of the first, with differing average grain sizes or orientations between the two materials.

Conclusion

Meenakshisundaram Ramanathan is an innovative inventor whose work in integrated circuit structures showcases his potential in the field. His latest patent applications reflect his commitment to advancing technology in this area.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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