Cologno Monzese, Italy

Mauro Chinosi

This inventor holds 15 USPTO granted patents, primarily in Floating Gate Technology. Top assignees: Stmicroelectronics S.r.l., Sgs-Thomson Microelectronics S.r.l.. Active years: 1999-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mauro Chinosi. Retrieved from https://idiyas.com/inventor/mauro-chinosi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 5.3

ph-index = 8

Forward Citations = 149(Granted Patents)


Location History:

  • Monzese, IT (1999)
  • Agrate Brianza, IT (2003)
  • Cologno Monzese, IT (1999 - 2004)

Company Filing History:


Years Active: 1999-2004

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Areas of Expertise:
Floating Gate MOS
VLSI Circuit Simulation
Word Recognition
Associative Memory
Charge Injection
Voltage Comparator
Digital-to-Analog Converter
Analog Memories
Programmable Reference Voltage
Memory Device
Current Converter
Input Structure
15 patents (USPTO):Explore Patents

Title: The Innovative Mind of Mauro Chinosi

Introduction

Mauro Chinosi is a prominent inventor based in Cologno Monzese, Italy. He has made significant contributions to the field of technology, particularly in memory devices and circuit simulation. With a total of 15 patents to his name, Chinosi's work reflects a deep understanding of complex systems and innovative solutions.

Latest Patents

One of Chinosi's latest patents is an "Associative memory device with optimized occupation, particularly for the recognition of words." This memory device features an associative memory designed for the storage of data across multiple classes. It includes a series of memory locations organized in rows and columns, allowing for efficient data storage and retrieval. Each row contains groups of memory locations that store different data classes, making it particularly suitable for automatic word recognition in written texts.

Another notable patent is the "Method for the electric dynamic simulation of VLSI circuits." This method involves dividing an integrated circuit into several independent subcircuits, which are then simulated using a digital simulator. By conducting simulations in parallel, the process becomes faster and more efficient, as each subcircuit operates independently.

Career Highlights

Chinosi has worked with leading companies in the technology sector, including STMicroelectronics S.r.l. and SGS-Thomson Microelectronics S.r.l. His experience in these organizations has allowed him to develop and refine his innovative ideas, contributing to advancements in electronic design and memory technology.

Collaborations

Throughout his career, Chinosi has collaborated with notable professionals in the field, including Alan H. Kramer and Roberto Antonio Canegallo. These partnerships have fostered a creative environment that has led to the development of groundbreaking technologies.

Conclusion

Mauro Chinosi's contributions to the field of technology through his patents and collaborations highlight his innovative spirit and expertise. His work continues to influence advancements in memory devices and circuit simulation, showcasing the importance of creativity in engineering.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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