Masaki Kaneko

Title: Innovations by Masaki Kaneko

Introduction

Masaki Kaneko is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. His work focuses on enhancing the efficiency and functionality of semiconductor memory devices.

Latest Patents

Among his latest innovations is a semiconductor memory device that features a plurality of sub bit lines connected to various memory cell transistors. This design allows for selective connection to a main bit line, utilizing metallic materials for both sub and main bit lines. Another notable patent is a non-volatile semiconductor memory device designed for selective cell flash. This device includes a mode signal output means for conducting flash programming or erasing, along with a group selection signal output means for selecting a row decoding group. The innovations in this patent aim to reduce the time required for flash programming and erasing without adding extra elements, while also minimizing chip area.

Career Highlights

Masaki Kaneko is currently employed at NEC Corporation, where he continues to develop cutting-edge technologies in semiconductor memory. His work has been instrumental in advancing the capabilities of memory devices, making them more efficient and effective for various applications.

Collaborations

Throughout his career, Kaneko has collaborated with notable colleagues, including Hiroyuki Kobatake and Masakazu Amanai. These partnerships have contributed to the successful development of his innovative technologies.

Conclusion

Masaki Kaneko's contributions to semiconductor technology exemplify the impact of innovation in the field. His patents reflect a commitment to improving memory device efficiency and functionality, solidifying his reputation as a leading inventor in Japan.