Suyama Susono, Japan

Masahisa Ueda

This inventor holds 1 USPTO granted patent. Top assignee: Other. Active years: 2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masahisa Ueda. Retrieved from https://idiyas.com/inventor/masahisa-ueda-nauqn6bb

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 25(Granted Patents)


Company Filing History:

goldMedal1 out of 834,601 
Other
 patents

Years Active: 2002

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1 patent (USPTO):Explore Patents

Title: Innovations of Masahisa Ueda in Ferroelectric Memory Integrated Circuits

Introduction: Masahisa Ueda is a notable inventor based in Suyama Susono, Japan. He has made significant contributions to the field of integrated circuits, particularly in the area of ferroelectric memory technology. His innovative approaches have led to advancements that enhance the performance and efficiency of memory devices.

Latest Patents: Ueda holds a patent for a "Structure for masking integrated capacitors of particular utility for ferroelectric memory integrated circuits." This patent describes a method for fabricating integrated capacitors that are essential in forming a ferroelectric capacitor array for ferroelectric memory integrated circuits. The process begins with a substrate, typically a partially-processed CMOS integrated circuit wafer coated with an adhesion layer. A bottom electrode layer, dielectric layer, and top electrode layer are deposited in a specific sequence. The method emphasizes the use of a single photomasking operation to define the top electrode and dielectric layers, which streamlines the fabrication process.

Career Highlights: Throughout his career, Ueda has focused on developing innovative solutions that address the challenges in integrated circuit design and manufacturing. His work has been instrumental in advancing the capabilities of ferroelectric memory devices, which are crucial for modern electronic applications.

Collaborations: Ueda has collaborated with notable colleagues in the field, including John Ortega and George Hickert. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and expertise, further enhancing the quality of their innovations.

Conclusion: Masahisa Ueda's contributions to the field of ferroelectric memory integrated circuits exemplify the impact of innovative thinking in technology. His patent and collaborative efforts highlight the importance of advancements in integrated circuit design, paving the way for future developments in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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