Atlanta, GA, United States of America

Maryam Ashouei

This inventor holds 1 USPTO granted patent. Top assignee: Other. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Maryam Ashouei. Retrieved from https://idiyas.com/inventor/maryam-ashouei-1fbij5aq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Company Filing History:

goldMedal1 out of 834,601 
Other
 patents

Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Maryam Ashouei: Innovator in Defect-Tolerant Logic Devices

Introduction

Maryam Ashouei is a prominent inventor based in Atlanta, GA (US). She has made significant contributions to the field of logic devices, particularly in developing systems that enhance defect tolerance. Her innovative work is paving the way for more reliable electronic components.

Latest Patents

Maryam holds 1 patent for her invention titled "Systems and methods for providing defect-tolerant logic devices." This patent describes systems and methods designed to create defect-tolerant logic devices. An exemplary embodiment of her invention includes a defect-tolerant logic device that consists of a plurality of CMOS gates, with at least one defective CMOS gate within that plurality. The invention allows the defective CMOS gate to be reconfigured into a pseudo-NMOS transistor or a pseudo-PMOS transistor, depending on which network is diagnosed as defective.

Career Highlights

Maryam Ashouei has established herself as a key figure in her field through her innovative research and development efforts. Her work focuses on enhancing the reliability of logic devices, which is crucial for the advancement of modern electronics.

Collaborations

Maryam has collaborated with notable professionals in her field, including Adit D Singh and Abhijit Chatterjee. These collaborations have contributed to her success and the advancement of her innovative projects.

Conclusion

Maryam Ashouei is a trailblazer in the development of defect-tolerant logic devices, with her patent showcasing her innovative approach to enhancing electronic reliability. Her contributions are significant in the ongoing evolution of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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