Mark Daniel Pogers

Title: Mark Daniel Pogers: Innovator in CPU and Circuit Layout Verification

Introduction

Mark Daniel Pogers is an accomplished inventor based in Wake Forest, NC (US). He holds 3 patents that showcase his expertise in the fields of CPU design and circuit layout verification. His innovative contributions have significantly impacted the technology landscape.

Latest Patents

One of Pogers' latest patents is titled "Automatic Elastic CPU for Physical Verification." This invention discloses a method, system, and computer-readable storage medium for executing physical verification jobs. The embodiment includes generating multiple commands related by a dependency graph, allocating computing resources, and managing command execution based on resource availability. Another notable patent is "Circuit Layout Verification," which presents a system and method for verifying original layouts. This patent involves generating a reduced layout, executing checks for interconnectivity, and outputting results related to connectivity mismatches.

Career Highlights

Mark Pogers is currently employed at Synopsys, Inc., where he applies his skills in developing advanced verification technologies. His work focuses on enhancing the efficiency and accuracy of physical verification processes in circuit design.

Collaborations

Throughout his career, Pogers has collaborated with talented professionals, including Sumit Bhagwanani and Lihhsing Ke. These collaborations have fostered innovation and contributed to the success of various projects.

Conclusion

Mark Daniel Pogers is a notable inventor whose work in CPU and circuit layout verification has made a significant impact in the technology sector. His patents reflect his commitment to advancing the field and improving verification processes.