Manosha S Karunatilaka

Title: Manosha S Karunatilaka: Innovator in High-Speed Multiplication Technology

Introduction

Manosha S Karunatilaka is a notable inventor based in Marlborough, MA (US). He has made significant contributions to the field of digital computing, particularly in the area of high-speed multiplication of binary numbers. His innovative approach has the potential to enhance computational efficiency in various applications.

Latest Patents

Karunatilaka holds a patent for a "High speed pipeline multiplier with virtual shift." This invention discloses a method and apparatus for achieving high-speed multiplication of binary numbers using a single clock cycle. The technology provides the same computational power as multiple clock cycle shift register configurations or asynchronous multistate logic configurations found in prior art. The concept of "virtual shifts" is introduced, where one or more positions within a register storing the partial products are allocated as placeholders, typically zeroes. These placeholders can be inserted in a single clock cycle, eliminating the need for multi-staged shift register configurations.

Career Highlights

Karunatilaka is currently employed at Agere Systems Inc., where he continues to develop innovative solutions in the field of digital technology. His work has been instrumental in advancing the capabilities of high-speed computing systems.

Collaborations

One of his notable coworkers is Han Nguyen, with whom he collaborates on various projects within the company.

Conclusion

Manosha S Karunatilaka's contributions to high-speed multiplication technology exemplify the impact of innovative thinking in the field of digital computing. His patent reflects a significant advancement that could reshape computational methodologies in the future.