San Jose, CA, United States of America

Maksim Baranov

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Maksim Baranov. Retrieved from https://idiyas.com/inventor/maksim-baranov

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: The Innovations of Maksim Baranov

Introduction

Maksim Baranov is an accomplished inventor based in San Jose, California. He has made significant contributions to the field of electronic design automation. His innovative work focuses on improving the efficiency of delay calculations in replicated designs.

Latest Patents

Maksim holds a patent titled "Efficient delay calculations in replicated designs." This patent discloses an improved approach to implement sharing of delay calculations for replicated portions of a design. The innovation addresses the challenge of differing input slews between those replicated design portions. As a result, the system experiences runtime improvements for timing analysis of electronic designs. He has 1 patent to his name.

Career Highlights

Maksim is currently employed at Cadence Design Systems, Inc., a leading company in electronic design automation. His work at Cadence has allowed him to apply his innovative ideas in a practical setting, contributing to advancements in the industry.

Collaborations

Maksim collaborates with talented individuals such as Igor Keller and Nikita Sergeev. Their combined expertise fosters a creative environment that drives innovation in their projects.

Conclusion

Maksim Baranov's contributions to electronic design automation through his patent and work at Cadence Design Systems, Inc. highlight his role as a significant inventor in the field. His innovative approach to delay calculations showcases the potential for improved efficiency in electronic designs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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