Luis Entrena

Title: Luis Entrena: Innovator in Digital Logic Optimization

Introduction

Luis Entrena is a notable inventor based in Madrid, Spain. He has made significant contributions to the field of digital logic optimization. His innovative approach focuses on enhancing the efficiency of digital networks through the strategic addition and removal of redundant connections.

Latest Patents

Luis Entrena holds a patent for an "Apparatus and method for logic optimization by redundancy addition." This method optimizes a digital logic network by iteratively adding and removing redundant connections. The process involves redundancy testing on connections that are dominated by the node being optimized. This technique identifies redundant connections and those that can be added to create further redundancies elsewhere in the network. By simplifying the network through this method, the cost efficiency of network optimization is significantly improved.

Career Highlights

Luis Entrena has worked with Lucent Technologies Inc., where he has applied his expertise in digital logic networks. His work has contributed to advancements in the optimization of digital systems, making them more efficient and cost-effective.

Collaborations

One of his notable collaborators is Kwang-Ting Cheng, with whom he has worked on various projects related to digital logic optimization.

Conclusion

Luis Entrena's innovative methods in digital logic optimization have made a lasting impact on the field. His patent reflects a deep understanding of network efficiency and redundancy management.