Guangzhou, China

Long Li

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Guangdong University of Technology. Active years: 2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Long Li. Retrieved from https://idiyas.com/inventor/long-li-okzauw9k

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2022

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1 patent (USPTO):Explore Patents

Title: Innovations in Chip Layout by Inventor Long Li

Introduction: Long Li, an innovative inventor based in Guangzhou, China, has made significant contributions to the field of chip design. With a focus on optimizing circuit layouts, his work is essential for enhancing the performance of electronic devices.

Latest Patents: Long Li holds a patent for a "Chip layout method based on minimum total wire length." This method includes initializing a total wire length to a preset value and employing a sequence of iterations to generate and refine a layout that minimizes wire length. By randomly generating sequence pairs and evaluating their effectiveness, this method provides a systematic approach to achieving an efficient chip layout.

Career Highlights: Long Li is currently associated with the Guangdong University of Technology, where he contributes his expertise to the development of cutting-edge technologies in semiconductor design. His dedication to research and innovation has made a significant impact in his field.

Collaborations: In his pursuit of excellence, Long Li collaborates with talented colleagues, including Qiang Liu and Lijun Wei. Together, they enhance their research endeavors and push the boundaries of chip design technology.

Conclusion: Long Li's pioneering work in chip layout methods exemplifies the importance of innovation in technology. His contributions not only advance the field of electronics but also inspire future inventors and researchers to explore new possibilities in circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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