Lihhsing Ke

Title: Lihhsing Ke: Innovator in Circuit Layout Verification

Introduction

Lihhsing Ke is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of circuit layout verification, showcasing his expertise through his innovative patent.

Latest Patents

Lihhsing Ke holds a patent for a system, method, and computer-readable medium designed for verifying an original layout. This patent, which includes 1 patent, details a process where the original layout comprises cells arranged in a cell hierarchy, front-end-of-line (FEOL) layers, and back-end-of-line (BEOL) layers. The invention involves generating a reduced layout by trimming out cells below the top tier of the cell hierarchy and filtering out the FEOL layers. A text-based short check is executed on this reduced layout, followed by the generation of an augmented reduced layout that includes pin information for cells in a second tier connected to the top tier. An interconnectivity check is then performed based on a schematic for the circuit, ultimately outputting results such as the location of shorts or connectivity mismatches.

Career Highlights

Lihhsing Ke is currently employed at Synopsys, Inc., where he continues to develop and refine his innovative ideas in circuit design and verification. His work has had a substantial impact on the efficiency and accuracy of circuit layout processes.

Collaborations

Lihhsing has collaborated with notable coworkers, including Jinsik Yun and Chiu-Yu Ku, contributing to advancements in their field through teamwork and shared expertise.

Conclusion

Lihhsing Ke's contributions to circuit layout verification exemplify the importance of innovation in technology. His patent reflects a deep understanding of circuit design, and his work at Synopsys, Inc. continues to influence the industry positively.