This inventor holds 1 USPTO granted patent and 1 EPO patent. Top assignee: Siemens Industry Software Gmbh. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Lei Ling - Innovator in Integrated Circuit Design
Introduction
Lei Ling is an accomplished inventor based in Fremont, CA (US). He currently works at Siemens Industry Software GmbH, where he contributes to advancements in integrated circuit design. Although he has not yet been granted any patents, his work is focused on innovative solutions in the field.
Latest Patent Applications
Lei Ling's notable patent application is titled "Path-Based Layer Stack Connectivity Check for Plasma Induced Damage Avoidance." This application discloses a computing system that implements a reliability verification tool. The tool identifies a portion of a layout design describing an integrated circuit that includes a victim transistor connected to an aggressor transistor. The reliability verification tool can extract a resistance network for connections between the victim and aggressor transistors. It simulates the resistive network to determine connectivity between the wells of the victim and aggressor transistors prior to the victim transistor having a gate connected to the aggressor transistor.
Conclusion
Lei Ling's contributions to the field of integrated circuit design demonstrate his commitment to innovation and reliability in technology. His ongoing work at Siemens Industry Software GmbH is expected to lead to significant advancements in the industry.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
