La Menbrolle Sur Choisille, France

Laurent Siegert

This inventor holds 1 USPTO granted patent. Top assignee: Stmicroelectronics International N.v.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Laurent Siegert. Retrieved from https://idiyas.com/inventor/laurent-siegert

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Laurent Siegert and TRIAC Gate Design Innovation.

Introduction

Laurent Siegert is an inventor based in La Membrolle-sur-Choisille, France. His patent work includes a TRIAC gate design intended to improve the trade-off between commutation sensitivity and device performance.

Latest Patents

Siegert is associated with 1 patent: “Triac Gate Design for Commutation Sensitivity Trade-Off Improvement.” The invention describes a TRIAC with first and second main-terminal contacts and a gate-terminal contact. Its semiconductor regions are arranged in layers and extend across distinct lateral regions. The contact placement and configuration of the N-type and P-type regions are designed to improve the balance between commutation sensitivity and other device characteristics.

Career Highlights

Siegert is associated with STMicroelectronics International N.V. His patent reflects work on semiconductor device structure and TRIAC design.

Collaborations

The available information associates Siegert’s patent work with STMicroelectronics International N.V. It does not specify individual co-inventors or other collaborators.

Conclusion

Laurent Siegert’s TRIAC gate design patent highlights his contribution to semiconductor innovation through a device structure aimed at improving the commutation sensitivity trade-off.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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