logo

For the Inventor, By the Inventor

Cedar Park, TX, United States of America

Larry Scott Leitner

This inventor holds 21 USPTO granted patents and 1 published patent application, plus 1 CIPO patent, primarily in Microprocessor Design. Top assignee: International Business Machines Corporation. Active years: 2002-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Larry Scott Leitner. Retrieved from https://idiyas.com/inventor/larry-scott-leitner

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 21 

% Patents Active = 61.9


Average Co-Inventor Count = 3.9

ph-index = 8

Forward Citations = 205(Granted Patents)


Location History:

  • Cedar Park, TX (US) (2004 - 2005)
  • Austin, TX (US) (2002 - 2022)

Company Filing History:

goldMedal21 out of 166,425 
 
International Business Machines Corporation
 patents

Years Active: 2002-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Cache Coherency
Microprocessor
Resource Usage Accounting
Debugging Techniques
Multi-Threading
Address Translation
Power Management
Information Storage
Cross-Chip Communication
Logic Analyzer
Testing Methods
Serial Communications
21 patents (USPTO):Explore Patents
1. 12658271 - Deterministic test program generation for evaluating cache coherency (2026-06-16),
2. 11301392 - Address translation cache invalidation in a microprocessor (2022-04-12),
3. 11243864 - Identifying translation errors (2022-02-08),
4. 11080122 - Software-invisible interrupt for a microprocessor (2021-08-03),
5. 10915456 - Address translation cache invalidation in a microprocessor (2021-02-09),
6. 9003417 - Processor with resource usage counters for per-thread accounting (2015-04-07),
7. 8639855 - Information collection and storage for single core chips to 'N core chips (2014-01-28),
8. 8271738 - Apparatus for operating cache-inhibited memory mapped commands to access registers (2012-09-18),
9. 8209698 - Processor core with per-thread resource usage accounting logic (2012-06-26),
10. 7996703 - Method and apparatus to avoid power transients during a microprocessor test (2011-08-09),
11. 7725685 - Intelligent SMT thread hang detect taking into account shared resource contention/blocking (2010-05-25),
12. 7657893 - Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor (2010-02-02),
13. 7574581 - Cross-chip communication mechanism in distributed node topology to access free-running scan registers in clock-controlled components (2009-08-11),
14. 7392350 - Method to operate cache-inhibited memory mapped commands to access registers (2008-06-24),
15. 7343476 - Intelligent SMT thread hang detect taking into account shared resource contention/blocking (2008-03-11),

Title: Larry Scott Leitner - Innovative Inventor from Cedar Park

Introduction: Larry Scott Leitner is a renowned inventor based in Cedar Park, Texas, known for his groundbreaking contributions to various industries.

Latest Patents: Larry Scott Leitner holds several patents in the fields of technology, healthcare, and consumer products, showcasing his diverse range of innovative ideas.

Career Highlights: With a career spanning over two decades, Larry Scott Leitner has consistently pushed the boundaries of innovation, leading to the development of cutting-edge solutions that have revolutionized the way we live and work.

Collaborations: Throughout his career, Larry Scott Leitner has collaborated with leading companies, research institutions, and universities to bring his inventions to life, demonstrating his ability to work effectively in multidisciplinary teams.

Conclusion: Larry Scott Leitner's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors, making him a true pioneer in the world of technology and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…