The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Oct. 06, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Debapriya Chatterjee, Austin, TX (US);

Bryant Cockcroft, Austin, TX (US);

Larry Leitner, Austin, TX (US);

John A. Schumann, Austin, TX (US);

Karen Yokum, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 12/02 (2006.01); G06F 12/109 (2016.01); G06F 12/1036 (2016.01);
U.S. Cl.
CPC ...
G06F 12/10 (2013.01); G06F 12/0284 (2013.01); G06F 12/0292 (2013.01); G06F 12/109 (2013.01); G06F 12/1036 (2013.01); G06F 2212/657 (2013.01);
Abstract

A method and an information handling system having a plurality of processors connected by a cross-processor network, where each of the plurality of processors preferably has a filter construct having an outgoing filter list that identifies logical partition identifications (LPIDs) that are exclusively assigned to that processor and/or an incoming filter list that identifies LPIDs on that processor and at least one additional processor in the system. In operation, if the LPID of the outgoing translation invalidation instruction is on the outgoing filter list, the address translation invalidation instruction is acknowledged on behalf of the system. If the LPID of the incoming invalidation instruction does not match any LPID on the incoming filter list, then the translation invalidation instruction is acknowledged, and if the LPID of the incoming invalidation instruction matches any LPID on the incoming filter list, then the invalidation instruction is sent into the respective processor.


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