Seoul, South Korea

Kyung Tae Wi

This inventor holds 2 USPTO granted patents. Top assignee: Lg Innotek Co., Ltd.. Active years: 2011-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kyung Tae Wi. Retrieved from https://idiyas.com/inventor/kyung-tae-wi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2011-2012

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2 patents (USPTO):Explore Patents

Title: Kyung Tae Wi: Innovator in Semiconductor Packaging

Introduction

Kyung Tae Wi is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of semiconductor packaging, holding a total of 2 patents. His work focuses on enhancing the efficiency and effectiveness of semiconductor manufacturing processes.

Latest Patents

One of Kyung Tae Wi's latest patents is a dicing film that incorporates a shrinkage release film. This innovative dicing film is designed for use in the manufacturing of semiconductor packages. The invention allows for easier separation of the die adhesive film and the die from the adhesive film used for dicing a wafer. This advancement simplifies the process of picking up semiconductor dies, thereby improving overall manufacturing efficiency.

Career Highlights

Kyung Tae Wi is currently employed at LG Innotek Co., Ltd., where he continues to develop cutting-edge technologies in semiconductor packaging. His expertise in this area has positioned him as a valuable asset to his company and the industry at large.

Collaborations

Kyung Tae Wi collaborates with talented colleagues, including Joon Mo Seo and Hyuk Soo Moon. Together, they work on innovative projects that push the boundaries of semiconductor technology.

Conclusion

Kyung Tae Wi's contributions to semiconductor packaging through his patents and collaborative efforts highlight his role as a key innovator in the field. His work continues to influence advancements in semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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