Walnut Creek, CA, United States of America

Kyoungsub Shin


Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):

Title: Innovations by Kyoungsub Shin in CMOS Technology

Introduction

Kyoungsub Shin is a notable inventor based in Walnut Creek, CA (US). He has made significant contributions to the field of complementary metal-oxide-semiconductor (CMOS) technology. His innovative work focuses on enhancing the performance of CMOS devices through advanced transistor design.

Latest Patents

Kyoungsub Shin holds a patent titled "Complementary field-effect transistors having enhanced performance with a single capping layer." This invention enhances the performance of CMOS devices by providing a single capping layer over the MOS transistors. The capping layer induces stress in the transistor channel regions, which enhances carrier mobility. Specifically, the n-channel MOS transistors are fabricated in silicon with a (100) crystalline channel surface orientation, while the p-channel transistors are fabricated in silicon with a (110) channel surface crystalline orientation. The tensile stress in the capping layer improves electron mobility in the n-channel transistor, while compressive stress enhances hole mobility in the p-channel transistor.

Career Highlights

Kyoungsub Shin is affiliated with the University of California, where he continues to advance research in semiconductor technology. His work has been instrumental in developing more efficient and high-performance electronic devices.

Collaborations

Kyoungsub Shin collaborates with Tsu-Jae King, a fellow researcher who shares his passion for innovation in semiconductor technology.

Conclusion

Kyoungsub Shin's contributions to CMOS technology through his innovative patent demonstrate his commitment to enhancing electronic device performance. His work continues to influence the field and pave the way for future advancements.

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