Kyoto, Japan

Kyoko Miyamoto

This inventor holds 4 USPTO granted patents and 1 published patent application. Top assignees: Matsushita Electronics Corporation, Matsushita Electronics Company. Active years: 1996-2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kyoko Miyamoto. Retrieved from https://idiyas.com/inventor/kyoko-miyamoto

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 4 

% Patents Active = 100.0

Average Co-Inventor Count = 3.2

ph-index = 3

Forward Citations = 32(Granted Patents)


Company Filing History:


Years Active: 1996-2000

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4 patents (USPTO):Explore Patents

Title: Kyoko Miyamoto: Innovator in Semiconductor Technology

Introduction

Kyoko Miyamoto is a prominent inventor based in Kyoto, Japan. She has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. Her innovative work has paved the way for advancements in memory devices and etching methods.

Latest Patents

One of her latest patents is a method for forming a semiconductor memory device. This invention describes a floating gate type semiconductor memory and a method of manufacture that includes an erasing gate electrode. This design allows for the easy formation of a tunneling region while maintaining high reliability. The active region is isolated by element isolation insulating films on a semiconductor substrate. A gate insulating film and a floating gate electrode are sequentially formed on the active region, with a control gate electrode positioned above the floating gate electrode, separated by a silicon oxide film. Additionally, a tunneling insulating film is formed only on the side wall of the floating gate electrode, followed by the formation of an erasing gate electrode that covers the tunneling insulating film.

Another notable patent involves a method of etching a polysilicon layer. This method enhances the reliability of semiconductor integrated circuit (IC) production. In this process, a resist layer is formed on a polysilicon layer situated on a silicon dioxide layer on a silicon substrate. The resist layer serves as a mask while the polysilicon layer is etched, allowing silicon oxide to deposit on it. This technique effectively restrains carbon emission from the resist layer, significantly increasing the selectivity and etching speed ratio of the polysilicon layer compared to the silicon dioxide layer.

Career Highlights

Kyoko Miyamoto has worked with notable companies, including Matsushita Electronics Corporation and Matsushita Electronics Company. Her experience in these organizations has contributed to her expertise in semiconductor technology and innovation.

Collaborations

Throughout her career, she has collaborated with esteemed colleagues such as Fumihiko Noro and Kazuo Sato. These partnerships have further enriched her work and led to significant advancements in her field.

Conclusion

Kyoko Miyamoto is a trailblazer in semiconductor technology, with a strong portfolio of patents that reflect her innovative spirit. Her contributions continue to influence the industry and inspire future advancements in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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