Kawasaki, Japan

Kuniyuki Ohnishi

This inventor holds 1 USPTO granted patent. Top assignee: Kabushiki Kaisha Toshiba. Active years: 2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kuniyuki Ohnishi. Retrieved from https://idiyas.com/inventor/kuniyuki-ohnishi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2009

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1 patent (USPTO):Explore Patents

Title: Kuniyuki Ohnishi: Innovator in Semiconductor Technology

Introduction

Kuniyuki Ohnishi is a prominent inventor based in Kawasaki, Japan. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique semiconductor device that enhances manufacturing methods.

Latest Patents

Ohnishi holds a patent for a semiconductor device and its manufacturing method. This invention features a plurality of bare chips stacked on a support substrate, with spacers arranged between adjacent chips. The design includes inner leads connected to the pads of the bare chips via bonding wires, ensuring efficient functionality without contact issues.

Career Highlights

Ohnishi is associated with Kabushiki Kaisha Toshiba, a leading company in technology and electronics. His work at Toshiba has allowed him to explore and develop advanced semiconductor solutions. His patent reflects his commitment to innovation in the semiconductor industry.

Collaborations

Throughout his career, Ohnishi has collaborated with notable colleagues, including Noboru Okane and Ryoji Matsushima. These partnerships have fostered a creative environment that encourages technological advancements.

Conclusion

Kuniyuki Ohnishi's contributions to semiconductor technology exemplify his innovative spirit and dedication to advancing the field. His patent showcases the potential for improved manufacturing methods in the semiconductor industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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