Peng-Hu, Taiwan

Kun-Jung Chuang


Average Co-Inventor Count = 3.3

ph-index = 2

Forward Citations = 16(Granted Patents)


Location History:

  • Peng-Hu, TW (1999 - 2000)
  • Hsin-Chu, TW (2000)

Company Filing History:


Years Active: 1999-2000

Loading Chart...
3 patents (USPTO):Explore Patents

Title: Kun-Jung Chuang: Innovator in Semiconductor Technology

Introduction

Kun-Jung Chuang is a prominent inventor based in Peng-Hu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His innovative work focuses on improving the efficiency and effectiveness of semiconductor devices.

Latest Patents

One of his latest patents is titled "Low resistance poly landing pad." This method involves forming a low resistance poly landing pad by shunting the polysilicon of a landing pad with metallic conductors. The process includes opening a window through a first dielectric layer to expose a conducting region over a semiconductor substrate. A metallic layer is deposited overall, followed by a polysilicon layer, ensuring that the layers fill the window completely. The metal and polysilicon outside the window are removed through chemical and mechanical polishing, which also provides global planarization. Salicidation is then applied to cover the exposed surface of polysilicon, formed during polishing. A second dielectric is deposited, and an opening is created to the landing pad, allowing for electrical contact between the metallization on the second dielectric layer and the salicide of the landing pad.

Another notable patent is the "Method of forming a modified metal contact opening to decrease its aspect ratio." This method begins with the formation of a first insulating layer and a first barrier layer, which has a first barrier opening over a substrate. The first insulating layer is anisotropically etched through the first barrier opening, creating an upper contact hole. A second barrier layer is then formed on both the first barrier layer and the first insulating layer. This second barrier layer is also anisotropically etched, forming spacers on the sidewalls of the first insulating layer. The first insulating layer is further etched using the first barrier layer and the spacers as an etch mask, resulting in a lower contact hole. After removing the first barrier layer and the spacers, the reduced aspect ratio contact hole is formed, which is filled with contact metal to connect with the contact region in the substrate.

Career Highlights

Kun-Jung Chuang is currently employed at Taiwan Semiconductor Manufacturing Company Ltd., where he continues to innovate and contribute to advancements in semiconductor technology. His work has been instrumental in enhancing the performance and reliability of semiconductor devices.

Collaborations

Throughout his career, Kun-Jung has collaborated with notable colleagues

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…