Kyoto, Japan

Koji Eriguchi

This inventor holds 1 USPTO granted patent. Top assignee: Sony Semiconductor Solutions Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Koji Eriguchi. Retrieved from https://idiyas.com/inventor/koji-eriguchi-uzpb5z4o

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Koji Eriguchi: Innovator in Semiconductor Technology

Introduction

Koji Eriguchi is a prominent inventor based in Kyoto, Japan. He has made significant contributions to the field of semiconductor technology, particularly in the area of defect density calculation methods. His innovative work has implications for improving the quality and performance of semiconductor devices.

Latest Patents

Eriguchi holds a patent for a defect density calculation method, which includes a defect-density calculation program and apparatus, as well as a heat treatment control system and machining control system. This method calculates the temporal change of the defect density distribution in a semiconductor layer. It utilizes an arithmetic function based on the activation energy of defects, processing temperature, and processing time of the semiconductor layer.

Career Highlights

Koji Eriguchi is associated with Sony Semiconductor Solutions Corporation, where he applies his expertise in semiconductor technology. His work focuses on enhancing the reliability and efficiency of semiconductor manufacturing processes.

Collaborations

Eriguchi has collaborated with Nobuyuki Kuboi, contributing to advancements in semiconductor technology through their combined efforts.

Conclusion

Koji Eriguchi's innovative contributions to semiconductor technology, particularly in defect density calculation methods, highlight his role as a key inventor in this field. His work continues to influence the development of high-quality semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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