Hyogo, Japan

Koichi Kawauchi


Average Co-Inventor Count = 3.5

ph-index = 3

Forward Citations = 44(Granted Patents)


Company Filing History:


Years Active: 1990-2010

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7 patents (USPTO):Explore Patents

Title: Koichi Kawauchi: Innovator in Semiconductor Memory Technology

Introduction

Koichi Kawauchi is a prominent inventor based in Hyogo, Japan. He has made significant contributions to the field of semiconductor memory technology, holding a total of 7 patents. His innovative work has paved the way for advancements in memory array design and efficiency.

Latest Patents

Kawauchi's latest patents focus on a semiconductor memory that allows for a reduction in the area of a memory array block without compromising the gate widths of floating gates. This design features a plurality of select gates that extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The floating gates are placed in a staggered arrangement, creating a zigzag pattern. This innovative layout ensures that floating gates in adjacent columns deviate from each other in the Y direction, enhancing the overall efficiency of the memory design.

Career Highlights

Throughout his career, Koichi Kawauchi has worked with notable companies such as Renesas Technology Corporation and Mitsubishi Electric Corporation. His experience in these organizations has contributed to his expertise in semiconductor technology and innovation.

Collaborations

Kawauchi has collaborated with several talented individuals in his field, including Yutaka Takikawa and Satoko Kamakura. These collaborations have further enriched his work and led to advancements in semiconductor memory technology.

Conclusion

Koichi Kawauchi's contributions to semiconductor memory technology demonstrate his innovative spirit and dedication to advancing the field. His patents reflect a commitment to improving memory design and efficiency, making him a significant figure in the world of technology.

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