Hirakata, Japan

Kohji Matsumura

This inventor holds 3 USPTO granted patents. Top assignee: Sanyo Electric Co., Ltd.. Active years: 1993-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kohji Matsumura. Retrieved from https://idiyas.com/inventor/kohji-matsumura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.9

ph-index = 2

Forward Citations = 17(Granted Patents)


Company Filing History:


Years Active: 1993-1999

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3 patents (USPTO):Explore Patents

Title: Kohji Matsumura: Semiconductor Device Inventor

Introduction

Kohji Matsumura is an inventor based in Hirakata, Japan, whose work includes semiconductor devices and heterojunction field-effect technologies. His listed portfolio includes 3 patents, and he is associated with Sanyo Electric Co., Ltd.

Latest Patents

Matsumura’s listed patents include “Semiconductor Device with Floating Quantum Box.” The invention describes InAs quantum boxes embedded in an aluminum gallium arsenide spacer layer above a gallium arsenide buffer layer. Under a specified drain voltage, electrons accumulate in the quantum boxes, suppressing drain current.

Another listed patent is “Field-Effect Semiconductor Device Having Heterojunction.” It describes a layered semiconductor structure built on a gallium arsenide substrate, including an indium gallium arsenide electron-drifting layer and a silicon-doped region. The device also includes source, drain, and gate electrodes arranged across the semiconductor layers.

Career Highlights

Matsumura’s patent work reflects an emphasis on semiconductor structures designed to control electron movement and device current. His listed affiliation is Sanyo Electric Co., Ltd.

Collaborations

Minoru Sawada and Yasoo Harada are identified as Matsumura’s coworkers.

Conclusion

Kohji Matsumura’s listed inventions focus on semiconductor devices, including quantum-box and heterojunction designs that shape how electrons move through a device.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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