Company Filing History:
Years Active: 1998
Title: Overview of Inventor Kiromasa Hashimoto
Introduction: Kiromasa Hashimoto is a notable inventor hailing from Nishigou-mura, Japan. He holds a patent that demonstrates significant advancements in the field of wafer polishing technology. His expertise is recognized within the industry, and he is currently associated with Shin-Etsu Handotai Co., Ltd.
Latest Patents: Hashimoto's patent focuses on a process of polishing wafers. This innovative method involves a silicon wafer held on a rotatable wafer support plate, where it undergoes mechanochemical polishing through a series of steps. Notably, this process requires the use of an abrasive material situated between the wafer and polishing pad cloth, which is applied on a polishing surface plate. The technique allows for achieving wafer quality comparable to that of a traditional three-step polishing process, but streamlined into a two-step approach.
Career Highlights: Throughout his career, Kiromasa Hashimoto has been instrumental in developing techniques that enhance the efficiency and effectiveness of wafer polishing. His work embodies a meticulous understanding of the intricacies involved in the polishing process, and his patent showcases a primary polishing step characterized by high pressure and velocity adjustments that finely tune the polishing outcome.
Collaborations: In his endeavors, Hashimoto has collaborated with esteemed colleagues, including Toshihiro Tsuchiya and Kouichi Tanaka, who have contributed to the research and development initiatives within the company. Their collective efforts have significantly advanced the field and contributed to the innovations that are vital for the semiconductor industry.
Conclusion: Kiromasa Hashimoto's contributions through his patented processes reflect a deep commitment to innovation in wafer technology. His work at Shin-Etsu Handotai Co., Ltd. plays a critical role in driving forward advancements that enhance wafer quality, thus ensuring the ongoing evolution of semiconductor manufacturing practices.