Zhubei, Taiwan

Kheng-Guan Tan

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kheng-Guan Tan. Retrieved from https://idiyas.com/inventor/kheng-guan-tan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2013

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1 patent (USPTO):Explore Patents

Title: Kheng-Guan Tan: Innovator in Integrated Circuit Design

Introduction

Kheng-Guan Tan is a notable inventor based in Zhubei, Taiwan. He has made significant contributions to the field of integrated circuit design, particularly through his innovative methods and systems.

Latest Patents

Kheng-Guan Tan holds a patent for a method of generating an intellectual property block design kit, which includes an IP block circuit design and a simulation system for the integrated circuit design. This patent outlines a process for creating an IP block design kit that facilitates the manufacturing of integrated circuits. The method involves generating an IP block circuit design, simulating it based on various configuration sets, and producing a system-level characteristics table that organizes these configurations and models.

Career Highlights

Tan is associated with Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work focuses on enhancing the efficiency and effectiveness of integrated circuit design processes.

Collaborations

Some of his coworkers include Lee-Chung Lu and Yun-Han Lee, who contribute to the collaborative environment that fosters innovation within the company.

Conclusion

Kheng-Guan Tan's contributions to integrated circuit design through his patented methods exemplify the importance of innovation in technology. His work continues to influence the semiconductor industry and drive advancements in design methodologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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