This inventor holds 1 USPTO granted patent. Top assignee: Northrop Grumman Systems Corporation. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Kevin M. Frey and Fringe-Gated Castellated FET Technology.
Introduction
Kevin M. Frey is an inventor associated with Windsor Mill, Maryland, and Northrop Grumman Systems Corporation. His patent describes a field-effect transistor design that uses a fringe-gated structure and castellated features in a superlattice of stacked conducting channels.
Latest Patents
Frey is credited with 1 patent: “Fringe-gated castellated FET.” The invention places alternating castellations and trenches between the transistor’s source and drain. A fringe-field dielectric fills the lower portions of the trenches and lies beside the edges of selected conducting channels, while the gate electrode overlays the dielectric and castellations without directly adjoining those edges. This arrangement defines a distinctive gate structure for a transistor built on stacked conducting channels.
Career Highlights
Frey’s listed patent reflects work on transistor architecture and the design of field-effect devices. The patent identifies Northrop Grumman Systems Corporation as his company affiliation.
Collaborations
Ken Nagamatsu is identified as Frey’s coworker. The available information does not specify whether Nagamatsu collaborated on the patent.
Conclusion
Kevin M. Frey’s patent documents a specialized fringe-gated transistor design featuring castellations, trenches, and stacked conducting channels.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile