Trellech, United Kingdom

Keith Edward Buchanan

This inventor holds 1 USPTO granted patent. Top assignee: Aviza Europe Limited. Active years: 2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Keith Edward Buchanan. Retrieved from https://idiyas.com/inventor/keith-edward-buchanan-0t21m72m

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2007

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1 patent (USPTO):Explore Patents

Title: Keith Edward Buchanan: Innovator in Semiconductor Technology

Introduction

Keith Edward Buchanan is a notable inventor based in Trellech, GB. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.

Latest Patents

Buchanan holds a patent for a "Damascene structure with integral etch stop layer." This invention pertains to a semiconductor structure designed for dual damascene processing. It features upper and lower low k dielectric layers formed in a stack, where the upper surface of the lower layer includes an integral etch stop layer. This layer is created by exposing the upper surfaces of the layer to Hplasma without any prior anneal before the deposition of the upper layer. His work in this area has the potential to enhance the efficiency and performance of semiconductor devices.

Career Highlights

Keith Edward Buchanan is associated with Aviza Europe Limited, where he applies his expertise in semiconductor technology. His role at the company allows him to further develop and refine his innovative ideas in the field.

Collaborations

Buchanan has collaborated with Joon-Chai Yeoh, contributing to advancements in semiconductor technology through their combined efforts.

Conclusion

Keith Edward Buchanan is a prominent figure in the semiconductor industry, recognized for his innovative patent and contributions to technology. His work continues to influence the development of advanced semiconductor structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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