Hyogo, Japan

Keiichi Furuya

This inventor holds 1 USPTO granted patent. Top assignee: Other. Active years: 2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Keiichi Furuya. Retrieved from https://idiyas.com/inventor/keiichi-furuya-fxce952u

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:

goldMedal1 out of 834,601 
Other
 patents

Years Active: 2003

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1 patent (USPTO):Explore Patents

Title: The Innovations of Keiichi Furuya

Introduction

Keiichi Furuya is a notable inventor based in Hyogo, Japan. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique semiconductor device that addresses specific challenges in the industry.

Latest Patents

One of Keiichi Furuya's key patents is titled "Semiconductor device having a device formation region protected from a counterelectromotive force." This patent describes a semiconductor device that includes an epitaxial layer formed on a P type silicon substrate. It features a P+ diffusion layer that divides the epitaxial layer into an N− epi layer, which constitutes a device formation region, and an N− epi layer, which constitutes an invalid area. The device also incorporates an aluminum wire for electrically connecting the N− epi layer (invalid area) to the P+ diffusion layer. This design allows the potential of the N− epi layer (invalid area) to be equal to that of the P+ diffusion layer, effectively preventing electron supply from the P+ diffusion layer to the invalid area, even when electrons are supplied to the device formation region by a counterelectromotive force produced by a load with inductance.

Career Highlights

Throughout his career, Keiichi Furuya has demonstrated a strong commitment to advancing semiconductor technology. His innovative designs have garnered attention and respect within the industry. He has successfully secured a patent that showcases his expertise and understanding of complex electronic systems.

Collaborations

Keiichi Furuya has worked alongside talented colleagues, including Tomohide Terashima and Fumitoshi Yamamoto. Their collaborative efforts have contributed to the development of cutting-edge technologies in the semiconductor field.

Conclusion

Keiichi Furuya's contributions to semiconductor technology exemplify the spirit of innovation. His patented designs address critical challenges and pave the way for future advancements in the industry. His work continues to inspire and influence the field of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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