Seoul, South Korea

Kee Han Lee

This inventor holds 2 USPTO granted patents and 10 published patent applications. Top assignee: Lg Innotek. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kee Han Lee. Retrieved from https://idiyas.com/inventor/kee-han-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2 

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Kee Han Lee - Innovator in Circuit Board and Semiconductor Technology

Introduction

Kee Han Lee is an inventor based in Seoul, South Korea. He is known for his innovative work in the field of circuit boards and semiconductor packages. Although he currently holds no granted patents, his contributions to technology are noteworthy.

Latest Patent Applications

Kee Han Lee has filed several patent applications that showcase his expertise. One of his latest applications is for a "CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE COMPRISING SAME." This application describes a circuit board that includes an insulating layer, a circuit pattern layer, and a protective layer with multiple openings. The design aims to enhance the functionality and efficiency of circuit boards.

Another significant application is for a "SEMICONDUCTOR PACKAGE." This application outlines a semiconductor package that features an insulating layer, a protective layer, and embedded connection members. The design includes various bonding parts that improve the electrical connections within the package. These applications reflect Kee Han Lee's commitment to advancing semiconductor technology.

Conclusion

Kee Han Lee is an innovative inventor whose latest patent applications demonstrate his potential in the field of circuit boards and semiconductors. His work may lead to significant advancements in technology in the future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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