Santa Clara, CA, United States of America

Kecheng Qian

This inventor holds 1 USPTO granted patent. Top assignee: Advanced Micro Devices Corporation. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kecheng Qian. Retrieved from https://idiyas.com/inventor/kecheng-qian

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Kecheng Qian: Innovator in Networking Technology

Introduction

Kecheng Qian is a prominent inventor based in Santa Clara, CA, known for his contributions to networking technology. He has made significant strides in reducing latency in data processing units (DPUs) through innovative patent solutions. His work is particularly relevant in the context of modern networking demands.

Latest Patents

Kecheng Qian holds a patent titled "Programmable traffic ingress direction for reduced latency in a DPU." This invention describes a method for selectively bypassing a networking pipeline in a DPU. Instead of processing a packet through both the networking pipeline and a DMA pipeline, the packet is processed solely by the DMA pipeline. This approach effectively reduces latency for packets that do not require extensive network processing, such as Remote Direct Memory Access (RDMA) over Converged Ethernet (RoCE) packets. Additionally, the DPU can perform load balancing between different instances of the pipelines, enhancing overall efficiency.

Career Highlights

Kecheng Qian is currently employed at Advanced Micro Devices Corporation, where he continues to develop innovative solutions in the field of networking. His expertise and dedication to improving data processing technologies have made him a valuable asset to the company.

Collaborations

Kecheng has collaborated with notable colleagues, including Weihuang Wang and Alessandro Fulli, contributing to advancements in their shared field of expertise.

Conclusion

Kecheng Qian's innovative work in networking technology, particularly through his patent on reducing latency in DPUs, showcases his commitment to enhancing data processing efficiency. His contributions are significant in the ever-evolving landscape of networking solutions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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