Osaka, Japan

Kazuyuki Nakanishi

This inventor holds 32 USPTO granted patents and 3 published patent applications, primarily in Semiconductor Technology. Top assignees: Panasonic Corporation, Socionext Inc., Nuvoton Technology Corporation Japan. Active years: 2005-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazuyuki Nakanishi. Retrieved from https://idiyas.com/inventor/kazuyuki-nakanishi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 32 

% Patents Active = 71.9

Average Co-Inventor Count = 1.8

ph-index = 6

Forward Citations = 112(Granted Patents)


Location History:

  • Osaka, KP (2013)
  • Kyoto, JP (2013 - 2020)
  • Osaka, JP (2005 - 2024)

Company Filing History:


Years Active: 2005-2024

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Areas of Expertise:
Semiconductor Device
Integrated Circuit
Latch Circuit
Flip-Flop Circuit
Cell Arrays
Leakage Current Suppression
Interconnect Accuracy
Transistor Design
Power Supply Potential
Layout Structure
Delay Adjusting Function
32 patents (USPTO):Explore Patents

Title: Innovator Spotlight: Kazuyuki Nakanishi – A Pioneering Mind in Semiconductor Technology

Introduction: Kazuyuki Nakanishi, based in Osaka, Japan, is a distinguished inventor known for his significant contributions in the field of semiconductor technology. With an impressive portfolio of 32 patents, he has established himself as a leading figure in innovative electronic design and development.

Latest Patents: Nakanishi's latest patents showcase his ingenuity and expertise in semiconductor devices. One notable patent describes a semiconductor device that includes a plurality of line layers, featuring a first line and a second line that operates independently to transfer signals at the same level. This innovative design ensures improved signal integrity by optimizing the distance between these lines in relation to the line layers. Another patent introduces a semiconductor device that features a first latch circuit comprising multiple inverting circuits, strategically arranged to enhance performance. This semiconductor device exemplifies Nakanishi's commitment to advancing the efficiency and functionality of electronic components.

Career Highlights: During his career, Kazuyuki Nakanishi has made significant contributions to renowned companies such as Panasonic Corporation and Socionext Inc. His work has had a lasting impact on the field of semiconductor technology, pushing boundaries and inspiring new advancements in the industry.

Collaborations: Throughout his professional journey, Nakanishi has collaborated with esteemed colleagues, including Masaki Tamaru and Hidetoshi Nishimura. These partnerships have been instrumental in fostering innovation and driving forward cutting-edge technologies in semiconductor design.

Conclusion: Kazuyuki Nakanishi's prolific innovation and commitment to excellence in semiconductor technology are evident through his patents and career accomplishments. As he continues to push the envelope in electronic design, his work inspires future inventors and industry professionals alike, contributing to the ongoing evolution of the technology landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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