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For the Inventor, By the Inventor

Tokyo, Japan

Kazushi Amanuma

This inventor holds 6 USPTO granted patents. Top assignees: Nec Corporation, Nec Electronics Corporation, Other. Active years: 2001-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazushi Amanuma. Retrieved from https://idiyas.com/inventor/kazushi-amanuma

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 6

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 4

Forward Citations = 60(Granted Patents)


Company Filing History:

goldMedal3 out of 36,684 
 
Nec Corporation
 patents
silverMedal1 out of 2,467 
 
Nec Electronics Corporation
 patents
bronzeMedal2 out of 834,513 
Other
 patents

Years Active: 2001-2003

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6 patents (USPTO):Explore Patents
1. 6603203 - Semiconductor device having capacitive element structure and multilevel interconnection structure and method of fabricating the same (2003-08-05),
2. 6395612 - Semiconductor device and method of manufacturing the same (2002-05-28),
3. 6323510 - Semiconductor memory device having an array of memory cells including a select transistor and a storage capacitor wiring lines at 45° angles (2001-11-27),
4. 6316801 - Semiconductor device having capacitive element structure and multilevel interconnection structure and method of fabricating the same (2001-11-13),
5. 6281536 - Ferroelectric memory device with improved ferroelectric capacity characteristic (2001-08-28),
6. 6188098 - Semiconductor device and method of manufacturing the same (2001-02-13),

Title: Kazushi Amanuma: Innovator in Semiconductor Technology

Introduction

Kazushi Amanuma is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of six patents. His work focuses on enhancing the performance and reliability of semiconductor devices.

Latest Patents

Amanuma's latest patents include a semiconductor device featuring a capacitive element structure and a multilevel interconnection structure. This innovative capacitive element structure incorporates a capacitive dielectric film made of an oxide compound, positioned above at least a bottom level interconnection of the device. Another notable patent describes a semiconductor device that includes a device isolation oxide film, interlayer insulating films, hydrogen barrier films, a lower electrode, a capacitor insulating film, an upper electrode, and a wiring layer, all formed on a silicon substrate. The hydrogen barrier films are designed to prevent the deterioration of ferroelectric substances and high dielectric constant materials in reducing conditions, ensuring the device's overall performance remains unaffected.

Career Highlights

Kazushi Amanuma has worked with notable companies, including NEC Corporation. His experience in the semiconductor industry has allowed him to develop cutting-edge technologies that address critical challenges in device fabrication and performance.

Collaborations

Amanuma has collaborated with talented individuals such as Sota Shinohara and Yukinobu Murao. These partnerships have contributed to the advancement of his innovative projects and patents.

Conclusion

Kazushi Amanuma's work in semiconductor technology exemplifies the impact of innovation on modern electronics. His patents reflect a commitment to improving device functionality and reliability, making him a key figure in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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